The present application claims priority from a Japanese Patent Application No. 2003-287376 filed on Aug. 6, 2003, the contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a test apparatus, a correction value managing method, and a computer program. More particularly, the present invention relates to a test apparatus for testing a device under test with high precision by correcting the timing at which a test signal is supplied to the device under test or the voltage level of the test signal to the device under test for each of test modules.
2. Decription of the Related Art
In a conventional test apparatus, there has been an attempt to improve measurement accuracy in the test of a device under test by performing calibration on a timing generator for generating the timing at which a test signal is supplied to the device under, a driver for sending and/or receiving the test signal to and/or from the device under test, a comparator, etc. before the test of a device under test. Since the prior art documents have not been known yet, they will not described.
In the conventional test apparatus, a test module performs the test, holding the calibration data about the timing generator, the driver, the comparator, etc. in a volatile memory. Accordingly, when the power of the test apparatus is off, the calibration data is lost from the test module. Therefore, when performing the test next time, a user of the test apparatus artificially selects and retrieves proper calibration data and supplies the data to the test module to hold them. In this method, an artificial miss might happen in selecting the calibration data and the test of the device under test might not be performed with high precision.